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Altera Quartus II Software

About This Software
The Quartus II development software provides a complete design environment for system-on-a-programmable-chip (SOPC) design. Regardless of whether you use a personal computer or a UNIX or Linux workstation, the Quartus II software ensures easy design entry, fast processing, and straightforward device programming. The following sections describe the general capabilities and design flows of the Quartus II software.



Quartus II Highlights

The Quartus II software offers a rich graphical user interface complemented with an illustrated, easy-to-use online Help system. The complete Quartus II system comprises an integrated design environment that includes every step from design entry to device programming.

You can easily combine different types of design files in a hierarchical project, choosing the design entry format that works best for each functional block. You can use the Quartus II Block Editor to create block diagrams that describe your design at a high-level, then use additional block diagrams, schematics, AHDL Text Design Files (.tdf), EDIF Input Files (.edf), VHDL Design Files (.vhd), and Verilog HDL Design Files (.v) to create the lower-level design components. Architecture-independent design entry gives you the freedom to create logic without worrying about the final device implementation.

The advanced user interface to the Quartus II software lets you work with multiple files at the same time, editing multiple design files to transfer information between them, while simultaneously compiling or simulating another project. You can view an entire hierarchy of design files and move smoothly from one hierarchical level to another. As you open a design file, the Quartus II software automatically starts the appropriate design editor.

The Quartus II Compiler lies at the heart of the system, providing powerful design processing that you can customize to achieve the best possible silicon implementation of your project. Automatic error location and extensive documentation on error and warning messages make design modifications as simple as possible. At every step in the design process, the Quartus II software makes it easy for you to focus on your design—not on how to use the software.

The superb integration of the Quartus II software improves your efficiency and productivity, putting you in control of your logic design environment.


Design Capabilities:
The Quartus II software is a fully integrated, architecture-independent package for designing logic with Altera programmable logic devices (PLDs), including APEX 20K, APEX 20KC, APEX 20KE, APEX II, Cyclone, Cyclone II, FLEX 6000, FLEX 10K, FLEX 10KA, FLEX 10KE, HardCopy II, HardCopy Stratix, MAX II, MAX 3000A, MAX 7000AE, MAX 7000B, MAX 7000S, Mercury, Stratix, Stratix II, Stratix GX, and Stratix II GX devices. The Quartus II software offers a full spectrum of logic design capabilities:


  • Design entry using schematics, block diagrams, AHDL, VHDL, and Verilog HDL 
  • Floorplan editing 
  • LogicLock incremental design 
  • Powerful logic synthesis 
  • Functional and timing simulation 
  • Timing analysis 
  • Embedded logic analysis with SignalTap II Logic Analyzer 
  • Software source file importing, creation, and linking to produce programming files 
  • Combined compilation and software projects 
  • Automatic error location 
  • Device programming and verification 


NativeLink Integration with other EDA Tools:
The Quartus II software provides NativeLink integration with major design tools to provide seamless transfer of information between the Quartus II software and other EDA tools. This NativeLink integration allows the Quartus II software to easily identify the source of errors in the EDA tool's source files, enabling you to correct them quickly. In addition, the Quartus II software allows you to run many EDA tools automatically from within the Quartus II software, further enhancing its integration into your design flow.

The Quartus II software also reads standard EDIF netlist files, VHDL netlist files, and Verilog HDL netlist files, and generates VHDL and Verilog HDL netlist files, including VITAL-compliant files, for a convenient interface to other industry-standard EDA tools.


Downloads

Please Go www.altera.com
And download Quartus II 7.0 (32-Bit) Version in Evaluation Mode (30 day)

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